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Power-Constrained Testing of VLSI Circuits J. Koerting Damit stehen die Berichte des

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Damit stehen die Berichte des Instituts für Angewandte Managementforschung in direktem Kontext zu seiner Positionierung als Bindeglied zwischen wissenschaftlicher Arbeit im Kontext aktueller Fragestellungen der Managementforschung und der Anwendung der entsprechenden Forschungsergebnisse in der organisationalen Praxis

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Power-Constrained Testing of VLSI Circuits J. Koerting Damit stehen die Berichte desThis text focuses on techniques for minimizing power dissipation during test application at logic and register transfer levels of abstraction of the VLSI design flow. It surveys existing techniques and presents several test automation techniques for reducing power in scan based sequential circuits and BIST data paths. A Guide to the IEEE 1149. 4 Test Standard A Guide to the IEEE 1149. 4 Test Standard

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