Digital Timing Macromodeling for VLSI Design Verification formatIsbn:Hardcover - 9780792395805 In dieser Monographie

In dieser Monographie

disturbance attenuation

die Relevanz und der Stellenwert des Beschwerdemanagements angesprochen

das es lieben und leiden lässt

Digital Timing Macromodeling for VLSI Design Verification formatIsbn:Hardcover - 9780792395805 In dieser MonographieDigital Timing Macromodeling for VLSI Design Verification first of all provides an extensive history of the development of simulation techniques. It presents detailed discussion of the various techniques implemented in circuit, timing, fast timing, switch level timing, switch level, and gate level simulation. It also discusses mixed mode simulation and interconnection analysis methods. The review in Chapter 2 gives an understanding of the advantages